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 CD4013 4013 CD4013BE CMOS Dual D-type D Flip Flop TI DIP-14 logic gates
CD4013 4013 CD4013BE CMOS Dual D-type D Flip Flop TI DIP-14 logic gates
MPN :
SKU : CD4013-Q243
Stock : 293pcs
Price:PKR 50.00
Click on the following link for product video demo presentation. https://youtu.be/yrFyrFBzZII

CD4013 4013 CD4013BE CMOS Dual D-type D Flip Flop TI DIP-15


The CD4013 contains two D flip-flops. A D flip-flop stores a 1-bit value and only changes when it receives a clock signal. 
Specifically, its output pin (Q) changes to whatever is on the input pin D (data) when the clock (CLK) pin goes from LOW to HIGH.


Pin Name Pin # Type Description
VDD 14 Power Supply Voltage (+3 to +15V)
GND 7 Power Ground (0V)
Q1, Q2 1, 13 Output Outputs from the two D Flip-Flops
Q1, Q2 2, 12 Output Inverted outputs from the two D Flip-Flops
CLK1, CLK2 3, 11 Input Clock input for the two D Flip-Flops (Rising Edge)
D1, D2 5, 9 Input D (data) input for the two D Flip-Flops
S1, S2 6, 8 Input Preset the Flip-Flop output to 1
C1, C2 4, 10 Input Reset the Flip-Flop output to 0


To be able to use any of the D flip-flops in the chip, you need to first connect the VDD pin to the positive supply terminal and the GND pin to the negative supply terminal.


You can use a power supply voltage between 3V and 15V. Some versions of the 4013 chip support up to 20V. Check the datasheet of your version of the chip for exact values.


The D (data) pin is where you input the data you want to store in the flip-flop.


Provide a signal that goes from LOW to HIGH on the CLK pin to store the data from the D pin to the output pin Q.


The output pin Q is always the opposite of pin Q.


Use the S (set) pin to force the output pin HIGH.


Use the R (reset) pin to force the output pin LOW.


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